| High-throughput implementation of a million-point sparse fourier transform A Agarwal, H Hassanieh, O Abari, E Hamed, D Katabi 2014 24th International Conference on Field Programmable Logic and …, 2014 | 35 | 2014 |
| 27.4 a 0.75-million-point fourier-transform chip for frequency-sparse signals O Abari, E Hamed, H Hassanieh, A Agarwal, D Katabi, AP Chandrakasan, ... 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 33 | 2014 |
| A comparative evaluation of high-level hardware synthesis using reed–solomon decoder A Agarwal, MC Ng IEEE Embedded Systems Letters 2 (3), 72-76, 2010 | 33 | 2010 |
| Integrated circuit implementation of methods and apparatuses for monitoring occupancy of wideband GHz spectrum, and sensing respective frequency components of time-varying … D Katabi, O Salehi-Abari, E Hamed, HZ Al-Hassanieh, SHI Lixin, ... US Patent 9,313,072, 2016 | 16 | 2016 |
| Leveraging rule-based designs for automatic power domain partitioning A Agarwal 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 326-333, 2013 | 10 | 2013 |
| Design contest overview: Combined architecture for network stream categorization and intrusion detection (CANSCID) M Pellauer, A Agarwal, A Khan, MC Ng, M Vijayaraghavan, F Brewer, ... Eighth ACM/IEEE International Conference on Formal Methods and Models for …, 2010 | 10 | 2010 |
| Generating infrastructure for FPGA-accelerated applications M King, A Khan, A Agarwal, O Arcas 2013 23rd International Conference on Field programmable Logic and …, 2013 | 8 | 2013 |
| Comparison of high level design methodologies for algorithmic IPs: Bluespec and C-based synthesis A Agarwal Massachusetts Institute of Technology, 2009 | 5 | 2009 |
| Arvind. Generating infrastructure for FPGA-accelerated applications." M King, A Khan, A Agarwal, O Arcas 23rd International Conference on Field programmable Logic and Applications …, 2013 | 4 | 2013 |
| Use of high-level design information for enabling automation of fine-grained power gating A Agarwal Massachusetts Institute of Technology, 2014 | 1 | 2014 |
| Implementing a fast cartesian-polar matrix interpolator A Agarwal, N Dave, K Fleming, A Khan, M King, MC Ng, ... Institute of Electrical and Electronics Engineers, 2009 | 1 | 2009 |
| 2010 Index IEEE Embedded Systems Letters Vol. 2 RA Abdallah, A Agarwal, D Atienza, JL Ayala, B Benson, G Bois, ... Automotive engineering 21, 22, 2010 | | 2010 |
| Design Contest Overview: Combined Architecture for Network Stream Categorization and Intrusion Detection (CANSCID) M Pellauer, A Agarwal, A Khan, MC Ng, M Vijayaraghavan, F Brewer, ... | | |
Dina KatabiProfessor of EECS, MITVerified email at ai.mit.edu
