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Avesta Sasan
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Ensemble learning for effective run-time hardware-based malware detection: A comprehensive analysis and classification
H Sayadi, N Patel, A Sasan, S Rafatirad, H Homayoun
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
1842018
SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks
KZ Azar, HM Kamali, H Homayoun, A Sasan
IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES), 97-122, 2019
1562019
Full-lock: Hard distributions of sat instances for obfuscating circuits using fully configurable logic and routing blocks
HM Kamali, KZ Azar, H Homayoun, A Sasan
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
1392019
Lut-lock: A novel lut-based logic obfuscation for fpga-bitstream and asic-hardware protection
HM Kamali, KZ Azar, K Gaj, H Homayoun, A Sasan
2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 405-410, 2018
1202018
Analyzing hardware based malware detectors
N Patel, A Sasan, H Homayoun
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
1142017
SRCLock: SAT-resistant cyclic logic locking for protecting the hardware
S Roshanisefat, H Mardani Kamali, A Sasan
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 153-158, 2018
1112018
Energy-efficient acceleration of big data analytics applications using FPGAs
K Neshatpour, M Malik, MA Ghodrat, A Sasan, H Homayoun
2015 IEEE International Conference on Big Data (Big Data), 115-123, 2015
892015
Pyramid: Machine learning framework to estimate the optimal timing and resource usage of a high-level synthesis design
HM Makrani, F Farahmand, H Sayadi, S Bondi, SMP Dinakarrao, ...
2019 29th International Conference on Field Programmable Logic and …, 2019
872019
2smart: A two-stage machine learning-based approach for run-time specialized hardware-assisted malware detection
H Sayadi, HM Makrani, SMP Dinakarrao, T Mohsenin, A Sasan, ...
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 728-733, 2019
822019
Threats on logic locking: A decade later
K Zamiri Azar, H Mardani Kamali, H Homayoun, A Sasan
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 471-476, 2019
752019
InterLock: An intercorrelated logic and routing locking
HM Kamali, KZ Azar, H Homayoun, A Sasan
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
672020
Machine learning-based approaches for energy-efficiency prediction and scheduling in composite cores architectures
H Sayadi, N Patel, A Sasan, H Homayoun
2017 IEEE international conference on computer design (ICCD), 129-136, 2017
672017
Adversarial attack on microarchitectural events based malware detectors
SMP Dinakarrao, S Amberkar, S Bhat, A Dhavlle, H Sayadi, A Sasan, ...
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
622019
NNgSAT: Neural network guided SAT attack on logic locked complex structures
KZ Azar, HM Kamali, H Homayoun, A Sasan
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
562020
Security and complexity analysis of LUT-based obfuscation: From blueprint to reality
G Kolhe, HM Kamali, M Naicker, TD Sheaves, H Mahmoodi, PDS Manoj, ...
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
552019
Xppe: cross-platform performance estimation of hardware accelerators using machine learning
HM Makrani, H Sayadi, T Mohsenin, S Rafatirad, A Sasan, H Homayoun
Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019
532019
A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache)
A Sasan, H Homayoun, A Eltawil, F Kurdahi
Proceedings of the 2009 international conference on Compilers, architecture …, 2009
462009
System and architecture level characterization of big data applications on big and little core server architectures
M Malik, S Rafatirad, A Sasan, H Homayoun
2015 IEEE International Conference on Big Data (Big Data), 2015
432015
Process variation aware sram/cache for aggressive voltage-frequency scaling
A Sasan, H Homayoun, A Eltawil, F Kurdahi
Proceedings of the Conference on Design, Automation and Test in Europe, 911-916, 2009
432009
ICNN: An iterative implementation of convolutional neural networks to enable energy and computational complexity aware dynamic approximation
K Neshatpour, F Behnia, H Homayoun, A Sasan
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 551-556, 2018
402018
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