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Jim Plusquellic
Jim Plusquellic
Verified email at ece.unm.edu - Homepage
Title
Cited by
Cited by
Year
Detecting malicious inclusions in secure hardware: Challenges and solutions
X Wang, M Tehranipoor, J Plusquellic
2008 IEEE International Workshop on Hardware-Oriented Security and Trust, 15-19, 2008
4802008
A novel technique for improving hardware trojan detection and reducing trojan activation time
H Salmani, M Tehranipoor, J Plusquellic
IEEE transactions on very large scale integration (VLSI) systems 20 (1), 112-125, 2011
3462011
Hardware Trojan detection and isolation using current integration and localized current analysis
X Wang, H Salmani, M Tehranipoor, J Plusquellic
2008 IEEE international symposium on defect and fault tolerance of VLSI …, 2008
2832008
Power supply signal calibration techniques for improving detection resolution to hardware Trojans
RM Rad, X Wang, M Tehranipoor, J Plusquellic
2008 IEEE/ACM International Conference on Computer-Aided Design, 632-639, 2008
2262008
Sensitivity analysis to hardware Trojans using power supply transient signals
R Rad, J Plusquellic, M Tehranipoor
2008 IEEE International Workshop on Hardware-Oriented Security and Trust, 3-7, 2008
2192008
Detecting Trojans Through Leakage Current Analysis Using Multiple Supply Pads
J Aarestad, D Acharyya, R Rad, J Plusquellic
IEEE Transactions on information forensics and security 5 (4), 893-904, 2010
2022010
Securing designs against scan-based side-channel attacks
J Lee, M Tehranipoor, C Patel, J Plusquellic
IEEE transactions on dependable and secure computing 4 (4), 325-336, 2007
1952007
New design strategy for improving hardware Trojan detection and reducing Trojan activation time
H Salmani, M Tehranipoor, J Plusquellic
2009 IEEE International Workshop on Hardware-Oriented Security and Trust, 66-73, 2009
1932009
A low-cost solution for protecting IPs against scan-based side-channel attacks
J Lee, M Tebranipoor, J Plusquellic
24th IEEE VLSI Test Symposium, 6 pp.-99, 2006
1922006
Protection against hardware trojan attacks: Towards a comprehensive solution
S Bhunia, M Abramovici, D Agrawal, P Bradley, MS Hsiao, J Plusquellic, ...
IEEE Design & Test 30 (3), 6-17, 2013
1782013
A sensitivity analysis of power signal methods for detecting hardware Trojans under real process and environmental conditions
R Rad, J Plusquellic, M Tehranipoor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18 (12 …, 2009
1612009
A physical unclonable function defined using power distribution system equivalent resistance variations
R Helinski, D Acharyya, J Plusquellic
Proceedings of the 46th Annual Design Automation Conference, 676-681, 2009
1512009
A test structure for characterizing local device mismatches
K Agarwal, F Liu, C McDowell, S Nassif, K Nowka, M Palmer, D Acharyya, ...
2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers., 67-68, 2006
1402006
Securing scan design using lock and key technique
J Lee, M Tehranipoor, C Patel, J Plusquellic
20th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2005
1212005
Cyber-physical systems: A security perspective
C Konstantinou, M Maniatakos, F Saqib, S Hu, J Plusquellic, Y Jin
2015 20th IEEE European Test Symposium (ETS), 1-8, 2015
1062015
Pipelined decision tree classification accelerator implementation in FPGA (DT-CAIF)
F Saqib, A Dutta, J Plusquellic, P Ortiz, MS Pattichis
IEEE Transactions on Computers 64 (1), 280-285, 2013
1042013
PUF-based authentication
W Che, F Saqib, J Plusquellic
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 337-344, 2015
932015
An experimental analysis of power and delay signal-to-noise requirements for detecting Trojans and methods for achieving the required detection sensitivities
C Lamech, RM Rad, M Tehranipoor, J Plusquellic
IEEE Transactions on Information Forensics and Security 6 (3), 1170-1179, 2011
822011
A layout-aware approach for improving localized switching to detect hardware Trojans in integrated circuits
H Salmani, M Tehranipoor, J Plusquellic
2010 IEEE International Workshop on Information Forensics and Security, 1-6, 2010
792010
At-speed transition fault testing with low speed scan enable
N Ahmed, CP Ravikumar, M Tehranipoor, J Plusquellic
23rd IEEE VLSI Test Symposium (VTS'05), 42-47, 2005
772005
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