A 3.1 Gb/s 88 Sorting Reduced K-Best Detector With Lattice Reduction and QR Decomposition CF Liao, JY Wang, YH Huang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (12 …, 2014 | 30 | 2014 |
Power-Saving 44 Lattice-Reduction Processor for MIMO Detection With Redundancy Checking CF Liao, YH Huang IEEE Transactions on Circuits and Systems II: Express Briefs 58 (2), 95-99, 2011 | 22 | 2011 |
A 684Mbps 57mW joint QR decomposition and MIMO processor for 4× 4 MIMO-OFDM systems PL Chiu, LZ Huang, LW Chai, CF Liao, YH Huang IEEE Asian Solid-State Circuits Conference 2011, 309-312, 2011 | 14 | 2011 |
Design of 4× 4 MIMO-OFDMA receiver with precode codebook search for 3GPP-LTE CC Lee, CF Liao, CM Chen, YH Huang Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 13 | 2010 |
A 576-Mbit/s 64-QAM 4 4 MIMO Precoding Processor With Lattice Reduction CF Liao, FC Lan, JW Jhang, YH Huang IEEE Transactions on Circuits and Systems II: Express Briefs 61 (2), 95-99, 2013 | 7 | 2013 |
Reduced-complexity LLL algorithm for lattice-reduction-aided MIMO detection CF Liao, YH Huang 2009 Conference Record of the Forty-Third Asilomar Conference on Signals …, 2009 | 6 | 2009 |
Hardware-efficient interpolation-based QR decomposition and lattice reduction processor for MIMO-OFDM receivers WY Chen, CF Liao, YH Huang Journal of Signal Processing Systems 88, 411-423, 2017 | 5 | 2017 |
A 0.18 nJ/Matrix QR decomposition and lattice reduction processor for 8× 8 MIMO preprocessing CF Liao, JY Wang, YH Huang 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 161-164, 2013 | 5 | 2013 |
Lattice reduction architecture and method and detection system thereof CF Liao, FC Lan, PL Chiu, YH Huang US Patent App. 13/006,446, 2012 | 5 | 2012 |
Loop-reduction LLL algorithm and architecture for lattice-reduction-aided MIMO detection CF Liao, LW Chai, YH Huang Journal of Electrical and Computer Engineering 2012, 1-7, 2012 | 5 | 2012 |
Latency-constrained low-complexity lattice reduction for MIMO-OFDM systems CF Liao, FC Lan, YH Huang, PL Chiu 2011 IEEE International Conference on Acoustics, Speech and Signal …, 2011 | 4 | 2011 |
COST reduction algorithm for 8× 8 lattice reduction aided K-best MIMO detector CF Liao, YH Huang 2012 IEEE International Conference on Signal Processing, Communication and …, 2012 | 3 | 2012 |
A constant-throughput LLL algorithm with deep insertion for LR-aided MIMO detection CE Chen, H Su, CF Liao, YH Huang 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 1251-1254, 2012 | 2 | 2012 |
A 6.4 G LLR/s 8× 8 64-QAM soft-output MIMO detector with lattice reduction preprocessing JY Lin, JC Chi, CF Liao, YH Huang 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 1-4, 2017 | 1 | 2017 |
Multi-stage lattice-reduction-aided MIMO detector using reverse-order LLL algorithm CF Liao, LW Chai, PL Chiu, YH Huang 2010 IEEE Asia Pacific Conference on Circuits and Systems, 100-103, 2010 | 1 | 2010 |
論移轉訂價稅制 陳清秀 法令月刊 59 (1), 81-113, 2008 | 1 | 2008 |
Low-complexity lattice reduction architecture using interpolation-based QR decomposition for MIMO-OFDM systems IW Liu, CF Liao, FC Lan, YH Huang 2012 IEEE Asia Pacific Conference on Circuits and Systems, 224-227, 2012 | | 2012 |