| Scheduling for multiple memory controllers J Chung, D Chatterjee US Patent 8,819,687, 2014 | 32 | 2014 |
| Memory-controller-parallelism-aware scheduling for multiple memory controllers J Chung, D Chatterjee US Patent 8,667,493, 2014 | 25 | 2014 |
| Method and apparatus for scheduling for multiple memory controllers J Chung, D Chatterjee US Patent 8,522,244, 2013 | 18 | 2013 |
| Enhanced shortest-job-first memory request scheduling J Chung, D Chatterjee US Patent 8,505,016, 2013 | 11 | 2013 |
| A genetic algorithm for non-slicing floorplan representation D Chatterjee, TW Manikas National Conference on Intelligent Systems, 2007 | 6 | 2007 |
| Power-density aware floorplanning for reducing maximum on-chip temperature D Chatterjee, TW Manikas 18th IASTED Int. Conf. on Modelling and Simulation (ICMS), 319-324, 2007 | 5 | 2007 |
| Deep Stalling using a Coverage Driven Genetic Algorithm Framework S Dhodhi, D Chatterjee, E Hill, S Godil 2021 IEEE 39th VLSI Test Symposium (VTS), 1-4, 2021 | 4 | 2021 |
| COOLER-A fast multiobjective fixed-outline thermal floorplanner D Chatterjee, TW Manikas, I Markov Proceedings of Austin Conference on Integrated Circuits and Systems, 2008 | 3 | 2008 |
| Systematic Constraint Relaxation (SCR): Hunting for Over-Constrained Stimulus SD Debarshi Chatterjee, Spandan Kachhadiya, Ismet Bayraktaroglu DVCON USA, 2022 | 2* | 2022 |
| On-chip thermal optimisation by whitespace reallocation using a constrained particle-swarm optimisation algorithm D Chatterjee, TW Manikas IET circuits, devices & systems 4 (3), 251-260, 2010 | 2 | 2010 |
| Multifunctional sensor nodes in stretchable network for structural health monitoring G Lanzara, N Salowitz, Z Guo, D Chatterjee, K Kim, P Peumans, ... Structural Health Monitoring 2009: From System Integration to Autonomous …, 2009 | 2 | 2009 |
| FIFO Topology Aware Stalling for Accelerating Coverage Convergence of Stalling Regressions D Chatterjee, P Lathigara, S Dhodhi, C Parsons 2022 IEEE 40th VLSI Test Symposium (VTS), 1-7, 2022 | 1 | 2022 |
| Mechanism to Generate FIFO VC Dependency Graph and its Application to System Level Deadlock Verification D Chatterjee, C Parsons, S Dhodhi DVCON 2021, 2021 | 1 | 2021 |
| BatchSolve: A Divide and Conquer Approach to Solving the Memory Ordering Problem SK Debarshi Chatterjee, Ismet Bayraktaroglu, Nikhil Sathe, Kavya Shagrithaya ... DVCON, 2022 | | 2022 |
| Overcoming the Thermal Challenge in Deep Submicron Technology Through Fast Thermal Floorplanning and Post Floorplanning Whitespace Reallocation D Chatterjee University of Tulsa, 2007 | | 2007 |
| GraphCov: RTL Graph Based Test Biasing for Exploring Uncharted Coverage Landscape D Chatterjee, S Kachhadia, C Luo, K Kushal, S Dhodhi | | |
jae woong chungceo, atto researchVerified email at atto-research.com
