| Approximative matrix inverse computations for very-large MIMO and applications to linear pre-coding systems H Prabhu, J Rodrigues, O Edfors, F Rusek 2013 IEEE Wireless Communications and Networking Conference (WCNC), 2710-2715, 2013 | 164 | 2013 |
| Benchmarking of Standard-Cell Based Memories in the Sub- Domain in 65-nm CMOS Technology P Meinerzhagen, SMY Sherazi, A Burg, JN Rodrigues IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1 (2 …, 2011 | 93 | 2011 |
| Hardware efficient approximative matrix inversion for linear pre-coding in massive MIMO H Prabhu, O Edfors, J Rodrigues, L Liu, F Rusek 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 1700-1703, 2014 | 68 | 2014 |
| 3.6 A 60pJ/b 300Mb/s 128× 8 Massive MIMO precoder-detector in 28nm FD-SOI H Prabhu, JN Rodrigues, L Liu, O Edfors 2017 IEEE International Solid-State Circuits Conference (ISSCC), 60-61, 2017 | 52 | 2017 |
| A low-complex peak-to-average power reduction scheme for OFDM based massive MIMO systems H Prabhu, O Edfors, J Rodrigues, L Liu, F Rusek 2014 6th international symposium on communications, control and signal …, 2014 | 49 | 2014 |
| Digital implementation of a wavelet-based event detector for cardiac pacemakers JN Rodrigues, T Olsson, L Sornmo, V Owall IEEE Transactions on Circuits and Systems I: Regular Papers 52 (12), 2686-2698, 2005 | 49 | 2005 |
| A receiver architecture for devices in wireless body area networks H Sjoland, JB Anderson, C Bryant, R Chandra, O Edfors, AJ Johansson, ... IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2 (1 …, 2012 | 48 | 2012 |
| TamaRISC-CS: An ultra-low-power application-specific processor for compressed sensing J Constantin, A Dogan, O Andersson, P Meinerzhagen, JN Rodrigues, ... 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip …, 2012 | 45 | 2012 |
| A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOS P Meinerzhagen, O Andersson, B Mohammadi, Y Sherazi, A Burg, ... 2012 Proceedings of the ESSCIRC (ESSCIRC), 321-324, 2012 | 38 | 2012 |
| Minimum-energy sub-threshold self-timed circuits: design methodology and a case study OC Akgun, J Rodrigues, J Sparsø 2010 IEEE Symposium on Asynchronous Circuits and Systems, 41-51, 2010 | 35 | 2010 |
| QRS detection for pacemakers in a noisy environment using a time lagged artificial neural network JN Rodrigues, V Owall, L Sornmo ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001 | 29 | 2001 |
| A 290 mV Sub-ASIC for Real-Time Atrial Fibrillation Detection O Andersson, KH Chon, L Sörnmo, JN Rodrigues IEEE transactions on biomedical circuits and systems 9 (3), 377-386, 2014 | 27 | 2014 |
| High-Level Energy Estimation in the Sub-V Domain: Simulation and Measurement of a Cardiac Event Detector OC Akgun, JN Rodrigues, Y Leblebici, V Owall IEEE Transactions on Biomedical Circuits and Systems 6 (1), 15-27, 2011 | 26 | 2011 |
| A 65 nm single stage 28 fJ/cycle 0.12 to 1.2 V level-shifter B Mohammadi, JN Rodrigues 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 990-993, 2014 | 24 | 2014 |
| A < 1 pJ sub-VTcardiac event detector in 65 nm LL-HVT CMOS JN Rodrigues, OC Akgun, V Öwall 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, 253-258, 2010 | 22 | 2010 |
| Dual-VT4kb sub-VTmemories with <1 pW/bit leakage in 65 nm CMOS O Andersson, B Mohammadi, P Meinerzhagen, A Burg, JN Rodrigues 2013 Proceedings of the ESSCIRC (ESSCIRC), 197-200, 2013 | 21 | 2013 |
| A sign-bit auto-correlation architecture for fractional frequency offset estimation in OFDM I Diaz, L Wilhelmsson, J Rodrigues, J Löfgren, T Olsson, V Öwall Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 21 | 2010 |
| A 128 kb 7T SRAM using a single-cycle boosting mechanism in 28-nm FD–SOI B Mohammadi, O Andersson, J Nguyen, L Ciampolini, A Cathelin, ... IEEE Transactions on Circuits and Systems I: Regular Papers 65 (4), 1257-1268, 2017 | 19 | 2017 |
| Ultra low voltage synthesizable memories: A trade-off discussion in 65 nm CMOS O Andersson, B Mohammadi, P Meinerzhagen, A Burg, JN Rodrigues IEEE Transactions on Circuits and Systems I: Regular Papers 63 (6), 806-817, 2016 | 19 | 2016 |
| A 35 fJ/bit-access sub-VTmemory using a dual-bit area-optimized standard-cell in 65 nm CMOS O Andersson, B Mohammadi, P Meinerzhagen, JN Rodrigues ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 243-246, 2014 | 15 | 2014 |
Viktor OwallProfessor in Circuit Design, Lund UniversityBekræftet mail på eit.lth.se
