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Vijender Kumar Sharma
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A review on power supply induced jitter
JN Tripathi, VK Sharma, H Shrimali
IEEE Transactions on Components, Packaging and Manufacturing Technology 9 (3 …, 2018
532018
A comparative analysis of jitter estimation techniques
VK Sharma, JN Tripathi, R Nagpal, S Deb, R Malik
Electronics, Communication and Computational Engineering (ICECCE), 2014 …, 2014
172014
An analysis of power supply induced jitter for a voltage mode driver in high speed serial links
JN Tripathi, VK Sharma, H Advani, PN Singh, H Shrimali, R Malik
Signal and Power Integrity (SPI), 2016 IEEE 20th Workshop on, 1-4, 2016
152016
The harmonics impact study of a DC-DC buck converter through a power delivery network
VK Sharma, JN Tripathi, H Shrimali, R Malik
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2017 …, 2017
8*2017
Nonlinear modeling and analysis of buck converter using volterra series
H Shrimali, VK Sharma, JN Tripathi, R Malik
Electronics, Circuits and Systems (ICECS), 2017 24th IEEE International …, 2017
62017
Deterministic Noise Analysis for Single-Stage Amplifiers by Extension of Indefinite Admittance Matrix
VK Sharma, JN Tripathi, H Shrimali
IEEE Open Journal of Circuits and Systems 1, 1-15, 2020
52020
Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator
VK Sharma, BD Kumar, MS Illikkal, JN Tripathi, N Gupta, H Shrimali
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019
52019
Analysis of a serial link for power supply induced jitter
JN Tripathi, H Advani, RK Nagpal, VK Sharma, R Malik
System-on-Chip Conference (SOCC), 2015 28th IEEE International, 127-130, 2015
52015
Analysis of power supply noise in AMS circuits including the effects of interconnects using estimation by inspection method
VK Sharma, JN Tripathi, H Shrimali
AEU-International Journal of Electronics and Communications 139, 153913, 2021
42021
A Quick Assessment of Nonlinearity in Power Delivery Networks
VK Sharma, JN Tripathi, H Shrimali
2018 IEEE Electrical Design of Advanced Packaging and Systems Symposium …, 2018
22018
Extension of EMPSIJ for Estimating the Impact of Substrate Noise on Jitter in a CMOS Inverter
VK Sharma, JN Tripathi, H Shrimali
IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) Symposium, 1-3, 2018
22018
Distortion analysis for a DC-DC buck converter
VK Sharma, H Shrimali, JN Tripathi, R Malik
SoC Design Conference (ISOCC), 2017 International, 212-213, 2017
22017
Novel Observations and Physical Insights on PSIJ Behavior in CMOS Chain-of-Inverters
MS Illikkal, JN Tripathi, VK Sharma, H Shrimali, R Achar
IEEE Access 10, 100172-100177, 2022
12022
An Inspection Based Method to Analyse Deterministic Noise in N-port Circuits
VK Sharma, JN Tripathi, H Shrimali
2020 IEEE 29th Conference on Electrical Performance of Electronic Packaging …, 2020
12020
A Generalised Approach for Analysing the Impact of Supply Noise in MOS Amplifiers
VK Sharma, JN Tripathi, H Shrimali
2020 IEEE 24th Workshop on Signal and Power Integrity (SPI), 1-4, 2020
12020
Analysis and estimation of jitter sub-components
VK Sharma, S Deb
IIIT Delhi, 2014
12014
Indefinite Admittance Matrix based Modelling of PSIJ in Nano-Scale CMOS I/O Drivers
VK Sharma, JN Tripathi, H Shrimali
IEEE Open Journal of Nanotechnology, 2022
2022
Design and Distortion Analysis of a Power Delivery Network in the Presence of Internal Supply Noise
VK Sharma, JN Tripathi, H Shrimali
IEEE Transactions on Components, Packaging and Manufacturing Technology, 2022
2022
Design and Analysis of a Low PSIJ, Energy Efficient Bootstrapped Driver for Space Application
S Dhiman, VK Sharma, H Shrimali
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020
2020
Estimation of inter-symbol interference using clock pattern
VK Sharma, JN Tripathi, R Nagpal, S Deb, R Malik
Electronic Packaging Technology (ICEPT), 2015 16th International Conference …, 2015
2015
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Artikler 1–20